一种带新型直流失调补偿电路的模拟数字控制可配置的自动增益控制器

本文提出一种可用于零中频接收机的模拟/数字控制可配置的自动增益控制环路的设计,应用一种新型的直流失调消除电路。这种自动增益控制环路可配置于模拟或者数字控制,以便与不同的基带芯片兼容。本文更进一步提出了一种新型的直流失调消除电路,这种直流失调消除电路实现了低于10KHz的下限截止频率（HPCF,high pass cutoff frequency）。自动增益控制环路电路采用0.18um CMOS工艺。当配置于模拟控制模式下,这种自动增益控制环路的增益动态范围为70dB,3dB带宽大于60M。当配置于数字控制模式下,通过5比特的数字控制码控制,这种自动增益控制环路的增益动态范围为64dB,步进精度2dB,步进误差小于0.3dB。当输入引入40mV直流失调,电路输出直流失调电压小于1.5mV。电路整体功耗小于3.5mA,面积800um*300um。     

A programmable gain amplifier with a DC offset calibration loop for a directconversion WLAN transceiver

A high-linearity PGA(programmable gain amplifier) with a DC offset calibration loop is proposed.The PGA adopts a differential degeneration structure to vary voltage gain and uses the closed-loop structure including the input op-amps to enhance the linearity.A continuous time feedback based DC offset calibration loop is also designed to solve the DC offset problem.This PGA is fabricated by TSMC 0.13μm CMOS technology.The measurements show that the receiver PGA(RXPGA) provides a 64 dB gain range with a step of 1 dB,and the transmitter PGA(TXPGA) covers a 16 dB gain.The RXPGA consumes 18 mA and the TXPGA consumes 7 mA (I and Q path) under a 3.3 V supply.The bandwidth of the multi-stage PGA is higher than 20 MHz.In addition,the DCOC(DC offset cancellation) circuit shows 10 kHz of HPCF(high pass cutoff frequency) and the DCOC settling time is less than 0.45μs.     

A low-power 10-bit 250-KSPS cyclic ADC with offset and mismatch correction

A low power 10-bit 250-k sample per second(KSPS) cyclic analog to digital converter(ADC) is presented. The ADC’s offset errors are successfully cancelled out through the proper choice of a capacitor switching sequence.The improved redundant signed digit algorithm used in the ADC can tolerate high levels of the comparator’s offset errors and switched capacitor mismatch errors.With this structure,it has the advantages of simple circuit configuration,small chip area and low power dissipation.The cyclic ADC manufactured with the Chartered 0.35μm 2P4M process shows a 58.5 dB signal to noise and distortion ratio and a 9.4 bit effective number of bits at a 250 KSPS sample rate.It dissipates 0.72 mW with a 3.3 V power supply and occupies dimensions of 0.42×0.68 mm~2.     

一种应用于直接变频系统的低功耗混合信号直流失调消除电路

A low power mixed signal DC offset calibration (DCOC) circuit for direct conversion receiver applications is designed. The proposed DCOC circuit features low power consumption, fast settling time and a small die area by avoiding the trade-off between loop response time and the high pass frequency of the DCOC servo loop in conventional analog DCOC systems. By applying the proposed DC offset correction circuitry, the output residue DC offset voltages are reduced to less than 38 mV and the DCOC loop settling time is less than 100 μs. The DCOC chip is fabricated in a standard 0.13-μm CMOS technology and drains only 196 μA from a 1.2-V power supply with its chip area of only 0.372 × 0.419 mm².     

高动态条件下伪随机码捕获的旁瓣虚警分析

采用Matlab对扩频码的自相关旁瓣在载波频差条件下的改变情况进行了仿真,可以看出自相关旁瓣峰值和均值随载波频偏的变化发生了较为明显的改变,在0kHz-1kHz范围内变化最为明显,在1kHz～10kHz范围内变化幅度较小,成波浪起伏变化。同时自相关旁瓣的变化,导致系统捕获时的虚警概率也发生了相应变化,进而导致虚假捕获。而在采用白适应门限情况下,虚警概率大大降低,因此在实际情况中,基于高斯分布的固定门限不是最佳选择。     

短波正交频分复用(OFDM)传输性能研究

短波通信作为一种重要的通信方式一直受到信道带宽的限制,加之传输信道的不稳定性致使其传输效果不佳,如何有效的提高频带利用率、改善传输性能是短波通信的重要研究内容。正交频分复用(OFDM)是一种多载波数字调制技术,在提高频谱利用率、克服多径方面发挥了重要作用。文章以Simulink为平台构建短波OFDM通信系统仿真模型,并在频偏和多径条件下进行仿真,分析仿真结果可以看到,频偏和多径对系统的传输效果都有影响,其中频偏对通信系统的影响较为严重。     

谈谈中国胶印版材工业的发展——胶印·PS版·CTP版（二）

本文概述我国印刷版材工业发展的历史和现状,尤其是关于胶版印刷、PS版和CTP版方面。1973年以前,我国大部分印刷厂还在采用铅板印刷法,依靠国家政策的大力支持,我国印刷工业飞速发展,涵盖其相关器材、技术、生产和市场;现今,其产品已经可以与世界先进水平取齐。现在,胶印已经成为大部分印刷厂采用的主流工艺,采用PS版作为印版,其曝光则用印刷胶片,印刷胶片消耗量2008年达到9375万平米,而PS版的产量2008年达到27900万平米;CTP版的生产和应用也在迅速发展。     

Unified BER and optimum threshold analysis of binary modulations in simple and cascaded Rayleigh fading channels with switched combining

Following a unified analytical framework, the bit error rate (BER) of several coherent and non‐coherent binary modulation schemes is derived for a switched diversity system. The two variants of switched combining that have been investigated are switch and stay combining and switch and examine combining. For channel modelling, at first a simple slow flat fading channel is assumed, where the amplitude attenuation obeys the Rayleigh distribution. Later the BER calculations are repeated for cascaded Rayleigh fading channel case. Rayleigh fading is the most popular model for electromagnetic signal propagation in wireless media when both or either of the transmitter/receiver is fixed. On the other hand, when both the transmitter and the receiver are mobile, a cascaded (or double) Rayleigh fading model is better suited. The applicability of these two models, namely simple and cascaded Rayleigh model, has been indicated by several theoretical studies and their suitability is established by various field measurements. In our paper, simple closed‐form BER expressions as a function of switching threshold have been found and optimum switching thresholds have been computed for both these models as well as for both types of diversity combining described earlier. The results presented in this paper can be very useful for communication system designers to analyze link quality of switched diversity assisted systems in various wireless environments. Copyright © 2010 John Wiley & Sons, Ltd.     

基于FFT校频的分段匹配滤波器性能分析

为了对动态PN码捕获中使用的分段匹配滤波器的设计进行指导,在建立其数学模型的基础上,分析了分段数、FFT点数与载波频偏对滤波器性能的影响。结果表明,增加分段数可以减小载波频偏对相关峰的影响;增加FFT点数可以提高频偏校正的精度;在环境噪声为高斯白噪声情况下,存在最佳的分段数和FFT点数组合,可以用最小运算量达到最佳捕获效果。     

基于多模速率方程电路建模的太赫兹量子级联激光器稳态性能及输出光谱特性分析

通过改进的三能级多模态速率方程,运用电路建模 方法,建立了太赫兹(THz)量子级联激光器(QCL)的一种等效电路模型。由于基于多模 态效应进行建模,所建模型能够有效表 征多模态效应对THz QCL光电性能的影响。模型中,涉及的非辐射散射时间、自激发射弛豫 时间以及电子逃 逸时间均根据器件有源层结构参数通过自洽数值求解获得。采用所建模型,可运用通用电路 仿真工具实现对 THz QCL光电特性的模拟分析,克服了数值分析方法计算复杂、模拟时间长的缺点。运用电 路仿 真工具PSPICE对2.47THz QCL的稳态特性和输出光谱特性进行了模拟 分析,并讨论了温度变化对器 件阈值电流、输出光功率以及输出频谱的影响,分析结果与已报道的理论和实验结果一致 ,验证了本文方法的适用性和准确性。